RE: [dsdp-dd-dev] Memory view and addressable size

["Anthony Berent" <anthony.berent@xxxxxxx>]

John Cortell wrote:
> OK. So, to confuse matters some, I'd like to start a discussion on
> the need for the memory window to allow the user to specify the
> access size for the memory reads.  
>
> Let's consider a simple example:
> 
> In a memory configuration that has an addressable size of 1 (i.e.,
> memory location 0x10000 represents one byte of memory; 0x10001
> represents the next byte), there are cases where we want to let the
> user tell the backend how the bytes in the memory should be read from
> the target: one byte at a time, or in chunks of two, etc. Currently,
> it's up to the backend to do the physical reads as it sees fit, and
> in theory, this should have no effect on the reported bytes. However,
> such theory does not take into account some strange peculiarities of
> memory mapped registers (MMRs) in some embedded system. In these
> systems, reading 16 bits from an MMR address can return different
> results than if two consecutive 8 bit reads are done.          
> 
> At this point, I'm mostly curious to see if anyone else in the dsdp
> space has a similar requirement. 

The ability to control memory read, on some hardware, been important for us.
I too have come across examples where the value read depends on the read
size, including cases where a registers is only readable at all when read as
a certain size. In addition to the obvious cases, where this is specified as
an obscure feature of the hardware there are two other cases I can think of:

1. Read sensitive registers, e.g. FIFOs. In such registers the debugger (and
probably the user) must be able to control when the registers are read.
While this opens up whole new problems, one implication is that a user
request to read such a register must result in only a single read. 

2. Volatile registers that are not stopped at breakpoints (e.g. timer
registers). In such registers the value may make no sense if the register is
not read as an atomic operation.

It is even more important to control memory write sizes to certain memory
mapped registers, since it is quite common for control registers to require
that certain bits across the register be written simultaneously.

- Anthony
> 
> John
--------------------------

Anthony Berent

ARM Ltd

+44 1223 400763